Computer Microprocessor and Assembly Language

251. The status register is also called the ____________:

1. Condition code register
2. Flag register
3. A and B
4. None of these

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252. The structure of the stack is ____________ type structure:

1. First in last out
2. Last in last out
3. Both a & b
4. None of these

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253. The subprogram finish the return instruction recovers the return address from the:

1. Queue
2. Stack
3. Program counter
4. Pointer

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254. The time taken by the ADC from the active edge of SOC pulse till the active edge of EOC signal is called:

1. Conversion over
2. Conversion delay
3. Conversion signal
4. None of these

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255. The time taken for all stages of the assembly line to become active is called the:

1. Flow through time
2. Clock period
3. Throughput
4. All of these

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256. The upper 8 bit are called ____________:

1. BH
2. BL
3. AH
4. CH

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257. The upper red arrow show that CPU sends out the control signals ____________ and ____________ indicate the data is read from the memory:

1. Memory request
2. Read
3. Both A and B
4. None of these

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258. The value memvar must be transferred to the ____________:

1. Computer
2. CPU
3. Both A and B
4. None of these

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259. There are primarily two types of register:

1. general purpose register
2. dedicated register
3. A and B
4. none of these

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260. They were fabricated using a low power version of the HMOS technology called:

1. HSMOS
2. HCMOS
3. HSSOM
4. None of these

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