Computer Microprocessor and Assembly Language

91. hich is not the control bus signal:

1. READ
2. WRITE
3. RESET
4. None of these

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92. hich is the type of microcomputer memory:

1. Processor memory
2. Primary memory
3. Secondary memory
4. All of these

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93. hich latch is mostly used creating memory register:

1. SR-Latch
2. JK-Latch
3. D-Latch
4. T-Latch

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94. hich microprocessor to read an item from memory:

1. VAM
2. SAM
3. MOC
4. None of these

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95. hich RAM is created using MOS transistors:

1. Dynamic RAM
2. Static RAM
3. Permanent RAM
4. SD RAM

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96. hich register is used to communicate with memory:

1. MAR
2. MDR
3. Both A and B
4. None of these

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97. hich statement is false about WR signal:

1. WR signal controls the input buffer
2. The bar over WR means that this is an active low signal
3. The bar over WR means that this is an active high signal
4. If WR is 0 then the input data reaches the latch input

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98. hich statement is wrong according to linear decoding:

1. Address map is not contiguous.
2. Confects occur if two of the select lines become active at the same time
3. If all unused address lines are not used as chip selectors then these unused lines become don’t cares
4. None of these

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99. hich storage technique dose not decoding circuit:

1. Linear decoding
2. Fully decoding
3. Partially
4. None of these

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100. hich technique is used for main memory array design:

1. Linear decoding
2. Fully decoding
3. Both A and B
4. None of these

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